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Network Camera Controller with JPEG Encorder S1S65010 Evaluation Board Technical Manual (S5U1S65K01H0100/S5U1S65K01H1100)
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No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not...
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Packing Specification Board Revision Board Code [0: Main Board, 1: Camera Board] Category [H: Hardware, S: Software] Corresponding Device Model Code [65K01: S1S65010] Product Classification 2 [1S : Semiconductor IC for Communication] Product Classification 1 [S5U: Development Tools for Semiconductor]...
1. OVERVIEW 1. OVERVIEW This product, the S1S65010 Evaluation Board Kit, is for quickly building a network-accessible camera based on the Seiko Epson S1S65010 network camera chip. It consists of two main components: a main board (Product Number S5U1S65K01H0100) containing the S1S65010 and other major ICs and a camera board (Product Number S5U1S65K01H1100) for mounting a camera module.
JTAG I/F Serial Main Board EEPROM ‚ R ‚ Q KH‚ š 25MKH‚ š DIP-SW Pulse RJ-45 10/100 PHY S1S65010 Trans Connector ‚ Q ‚ R ‚ Q ‚ Q ‚ R ‚ Q Port Driver Data Buffer Flash SDRAM...
S P 3 2 3 2 E C Y TC 7 W 1 4 B R 2 4 L FVM-W uPC2933T MM1572H Figure 3.1. Main Board (Product Number S5U1S65K01H0100) Layout and Dimensions S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
S P - O U T ‚ j • | ‚ U ‚ Q ‚ T • | ‚ O ‚ P Figure 3.2. Camera Board (Product Number S5U1S65K01H1100) Layout and Dimensions S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
N e t wo rk B o ra d2 MT48 LC8 M16A2 TG- 75 Disk On Chip • i OPTION• j LED3 LED4 MO DE SW10 I NI T Figure 4.1. Main Board Layout S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
This layout matches that used by such PC motherboard manufacturers as ASUS and GIGABYTE. 4.1.5. Power Supply Connector (CN10: MJ-179P) (6) in Figure 4.1 This is for connecting the AC power supply adapter included with the kit. S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
(BVD2/DASP) (CFSTSCHG#) D8 (CF_D8) D9 (CF_D9) D10 (CD_D10) The following pins are nonfunctional on this evaluation board because the S1S65010 does not support them: VS1#, VS2#, WP, CD1#, CD2#, INPACK#, and BVD2. S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
CAMERA EXT 16 ‚ Q ‚ Q Figure 4.2. Camera Board Layout 4.2.1. Main Board Interfaces (1) CF control/monitor (CN3: HIF3H-16DB-2.54S) (1) in Figure 4.2 Pin Number Function Pin Number Function RESET# S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
GPIOD0 GPIOD1 4.2.2. Serial (RS232-C) Interface (CN6: XG8W-1031) (3) in Figure 4.2 Pin Number Function Pin Number Function This layout matches that used by such PC motherboard manufacturers as ASUS and GIGABYTE. S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
This board provides three (mutually exclusive) connectors for connecting a CMOS camera module. (8) to (10) in Figure 4.2 Location Function Product Number HV7131GP (HYCA3-L01) 245602-020-000-829 OV7640 EAA (or OV7648 EAA) 803-93-032-10-001 SA2101A A5-44DA-2DS S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
Figure 5.1. Main Board (Top View) TC7M H574 TC4S71F TC58FVM5B2AF SP3232 E C Y TC7W 14 BR24L FVM -W u PC2 9 3 3 T M M 1572H Figure 5.2. Main Board (Bottom View) S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
SW6 8 User setting User setting (MODESEL7) Note: This evaluation board appropriates this S1S65010 user setting input for use in returning switches to their factory default settings. 5.2. GPIOB DIP Switches (SW10) (2) in Figure 5.1 These switches (SW10) specify input to the corresponding GPIOB port pins: “1” for the OFF position and “0”...
Display Notes Position CFOE# (CF card input) CFRST_CN (CF card input) MOE# (S1S65010 output) CFRST (S1S65010 output) RESET# (HW-RESET) 5.5. Memory Chip Select Switch (SW5) (5) in Figure 5.1 This board includes Flash ROM and SRAM for use as external memory. The (SW5) switch on this board configures their chip select signals.
GPIOD0 MA20 GPIOD0 functions as MA20 Note: The firmware must configure the S1S65010 pins GPIOD0, GPIOD1, and GPIOB6 to match. 5.9. CF Card Interface SOLDER_JP (JP6, JP7) (11) to (12) in Figure 5.2 The JP6 and JP7 SOLDER_JP on this board control the connection of pull-up and pull-down resistances to this evaluation board’s CF card interface BVD2/DASP signal.
10% power supply connected to CN10. The following Table lists their applications. Table 6.1. Main Board Power Supplies Location Part No. Application Notes 3.3 V UPC2933T S1S65010 I/O circuits and other chips on board 2.7 V MM1572H S1S65010 camera The developer must match the interface parts used to camera module used.
6.3. Debugging Environment The debugging interface (CN1) is for connecting PALMiCE or other debugger. Figure 6.1 shows the results of connecting PALMiCE; Figure 6.2, a PALMiCE system controller register readout. Figure 6.1 Figure 6.2 S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
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(5) Deselect the Semihosting check box. (6) Press the “OK” button to apply the new settings. Failure to modify the above settings causes writing the load module to abort with the following message. Error: Too many breakpoints S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
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Double-clicking on the parameter file cside.cpf provides no menu command for doing so. The following shows the screen for specifying the JTAG clock speed. Figure 6.3. Specifying 5 MHz for JTAG Clock S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
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The following shows the dialog box for specifying the macro file and wait interval. Figure 6.4. Initial Settings Tab The following shows the dialog box for specifying the low-speed clock and port access method. Figure 6.5. Low-Speed Clock Settings S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
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Set the terminal emulator's baud rate to 9600. Figures 6.8 and 6.9 respectively show the serial port configuration dialog box and sample console output for Tera Term; Figures 6.10 and 6.11, the same for HyperTerminal. S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
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9. Click on “Continuous image” on the menu screen that appears. 10. Input the user name and password, then start capturing/monitoring. This board ships with only one user and the following default password. User name: root password: administrator S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
(1) This kit does not support hot-plugging of CF cards. The CF card must be in place when the power is first applied. The firmware assumes that it is always in place. S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
The following Table lists the major parts on the main board—that is, all parts except resistors and capacitors. Table 8.1. Main Board Parts Unit PART NO. PART NAME STANDARD Q'TY NOTES price K-624-01 MINICOM NETCAM CHIP S1S65010 (144pinQFP) EPSON FROM TC58FVM5B2AFT65(48pinTSOP) Toshiba SRAM TC55VBM416AFTN (48pinTSOP) Toshiba 5 U9 SDRAM MT48LC8M16A2TG-75 (54pinTSOP) MICRON 10/100 PHYSICAL...
9. MISCELLANEOUS 9. MISCELLANEOUS The following Figure shows this kit with a camera module. Figure9.1.Camera Board with OV7640 Module S1S65010 EPSON Evaluation Board Technical Manual (Rev. 1.1e)
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Phone: +852-2585-4600 FAX: +852-2827-4346 Central Telex: 65542 EPSCO HX 101 Virginia Street, Suite 290 Crystal Lake, IL 60014, U.S.A. EPSON TAIWAN TECHNOLOGY & TRADING LTD. Phone: +1-800-853-3588 FAX: +1-815-455-7633 14F, No. 7, Song Ren Road, Taipei 110 Northeast Phone: +886-2-8786-6688...
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